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《Microcontrollers & Embedded Systems》 2020-07
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Design of DMA High-speed Transmission Scheme Based on General RapidIO Controller

Shen Juncai;Information Science and Technology Academy,Southwest Jiaotong University;  
The purpose of this paper is to design a high-performance SoC for communication field,which requires high-speed transmission of large capacity data between boards.This SoC design integrates GRIO based on RapidIO 2.2 protocol specification.The single channel rate can reach 6.25 Gbaud,which meets the data transmission requirements of most applications.At the same time,considering the impact of mass data transmission on system performance,this design integrates DMA controller in RAB to reduce processor resource occupation and system performance loss.This paper mainly introduces the key design contents of GRIO and RAB in detail.Finally,the driver is designed based on the bare board.Through the point-to-point test with RapidIO soft IP core on the Xilinx Zynq7000 ZC706 development board,it shows that DMA read-write bandwidth can reach over 90% of the theoretical effective data bandwidth.
【CateGory Index】: TN402;TP332
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